A typical wireless receiver consists of a tuner and a demodulator. The tuner may include one or more input amplifier(s) and one or more base-band units. One or more of the base-band units may be a programmable gain amplifier (“PGA”). A PGA is an amplifier whose gain is programmable, which means that its gain value may be programmed to one of several optional values and, thereafter, reprogrammed to any other preferred value.
Traditionally, radio frequency (“RF”) tuners wirelessly receive RF signals and convert them into an intermediate frequency (“IF”) signal whose carrier frequency is lower enough to be conveniently processed by a digital demodulator. The demodulated data may be forwarded to its destination, for example to a data processor, where the data may be further processed.
Referring now to FIG. 1 (prior art), the number 100 refers to a high-level block diagram of a digital RF receiver and particularly a digital video broadcast handheld (“DVB-H”) receiver. An RF signal having a specific frequency may be received at antenna 101 and forwarded to tuner 102. Regardless of the specific frequency to which tuner 102 is tuned, tuner 102 normally forwards a fixed intermediate frequency (“IF”) signal to analog-to-digital converter (“ADC”) and demodulator 103, where the original information/data is extracted by demodulating the IF signal. The extracted information/data may then be forwarded to where it is needed. For example, the information/data may be forwarded to destination 104, shown at 108, where it may be further processed and/or introduced to a user, such as by being displayed to him.
Typically, each unit in the receiver 100 (for example tuner 102 and ADC & demodulator 103) may be controlled by the following unit (for example, destination 104) to which the receiver 100 forwards its output signal. For example, destination 104 may control ADC & demodulator 103 (shown at path 105) and ADC & demodulator 103 may control tuner 102 (shown at path 106). Ideally, by controlling tuner 102 and ADC & demodulator 103 in the manner described above should ensure that the data or signal each unit receives from its preceding unit is optimized, regardless of parasitic DC voltages that may exist in the tuner and the conditions of the communication channel. In particular, the quality of the signal (shown at 107) forwarded by tuner 102 to demodulator 103 may be critical to the performance of the receiver 100 as a whole.
In recent years, receivers have been designed with a “low-IF” tuner and zero IF (“ZIF”), in which the low frequency IF frequency may be near or at zero, respectively. An advantage of a zero-IF tuner is that there is no need for an additional band pass filter due to the use of a mixer in the IF frequency stage before the RF signal is converted into a base-band signal, which is the analog signal that is fed to an ADC for further processing. Instead, the IF signal in a zero-IF tuner can be applied directly, as is, to an ADC such as ADC 103. Thus, it may be said that the input RF carrier signal in a zero-IF tuner is converted to a base-band signal by using a single conversion step.
Referring now to FIG. 2 (prior art), the number 200 refers to a conventional zero-IF tuner that typically consists of two paths, known as the “I” path (220) and the “Q” path (230). The I path 220 typically includes a Low Pass Filter (“LPF”) such as LPF 208, which performs anti-aliasing, by filtering out signals with a frequency higher than the ADC aliasing frequency. In addition, the LPF (LPF 208, for example) filters out signals whose frequency is higher than the maximal frequency in the received frequency band. The Q path (generally shown at 230) is similar to the I path (generally shown at 220), except that LNA 201 output's signal 217 is mixed at mixer 219 with a signal (shown at 218) whose phase is shifted by +90 degrees. More about zero-IF tuners may be found, for example, in “Effective IM2 estimation for two-tone and WCDMA modulated blockers in zero-IF” by Walid Y. Ali-Ahmad, (Apr. 1, 2004), “A CDMA2000 Zero-IF Receiver With Low-Leakage Integrated Front-End” by H. Waite et al. (IEEE JOURNAL OF SOLID-STATE CIRCUITS, VOL. 39, NO. 7, July 2004, pg. 1175-1178), and in “A Multiple-Shape Channel Selection Filter for Multimode Zero-IF Receiver using Capacitor over Active Device Implementation” by Andreia Cathelin et al. (ESSCIRC 2002, page 651).
A traditional zero-IF tuner has various drawbacks. The bandwidth of a zero-IF signal is located in the frequency domain near direct current (“DC”), and there are other parasitic DC sources, which are not related in any way to the zero-IF signal, that may degrade the performance of the tuner. Therefore, the performance of the receiver as a whole may be reduced, as the parasitic DC sources may saturate the tuner's amplifiers and degrade the dynamic range of the ADC as well, depending on the actual parasitic DC voltage.
In order to mitigate the effect of the parasitic DC voltages, a DC cancellation loop is forced, usually by a demodulator such as demodulator 103 of FIG. 1. The purpose of the DC cancellation loop is to provide to a tuner such as 200 a correction DC voltage that will neutralize, or at least compensate for, the detrimental effect of the parasitic DC voltages.
In a traditional tuner, the value of the correction DC voltage is calculated by the demodulator based on intermediate metrics and monitored signal levels. After being set, the demodulator may forward the correction DC voltage to tuner 200. There is a mutual dependency between metrics as measured and calculated by a demodulator such as demodulator 103. In general, metrics may relate to various parameters associated with the receiver, and be used for monitoring and controlling the tuner's functionality. Metrics may relate, for example, to the received signal's energy which may be used to set the tuner's gain. Metrics may also relate to bit error rate (“BER”), error vector magnitude (“EVM”), and to I/Q-mismatch measurements that may be useful for calculating the mutual dependency between the two (I and Q) tuner's outputs (for example outputs 221 and 231 of tuner 200). For optimal reception, the signals corresponding to the I and Q path (for example signals 221 and 231, respectively) have to be orthogonal. The term “I/Q-mismatch” refers to a situation where the I and Q channels are not orthogonal, in which case it may be said that the I and Q path are undesirably mutually dependent. Because DC components look like a mutual dependant component they must be removed before estimation of the I/Q mismatch is performed. For example, a desired change in the PGA gain may result in an undesired change in the DC level, which may detrimentally affect both the energy of the signal as measured after the ADC and I/Q mismatch cancellation.
Referring again to FIG. 2, zero-IF tuner 200 typically includes PGA 209, the output of which is forwarded to an ADC such as ADC 103 in FIG. 1. When a received signal (shown at 216) is relatively weak, the gain of PGA 209 may be (re)programmed to high values. Under such conditions, it may often occur that even a relatively low DC voltage at the input 215 of the PGA 209 would result in a relatively high DC voltage at the output 221 of the PGA 209, which is problematic as far as the ADC functionally is concerned, partly because of the limited dynamic range of the ADC. A high DC voltage at the output 221 of the PGA 209, and therefore at the input of the ADC, such as ADC 103 with input signal 107, would degrade the performance of the ADC. Therefore, it is imperative that the demodulator, for example demodulator 103, forwards a correction DC voltage that cancels out as much of the parasitic DC voltage as possible before it reaches PGA 209.
Every time the gain of PGA 209 is reprogrammed to a new value, the DC level at output 221 of the PGA 209, which depends on the error of the DC correction loop at the PGA input, changes accordingly. However, it may take the demodulator (demodulator 103, for example) thousands of samples to make the necessary measurements and to calculate the new metrics before a new correction DC voltage is decided.
Consequently, a considerable amount of time may lapse before the demodulator finally applies a correction DC voltage (207) to the tuner. Therefore, reprogramming the gain of PGA 209 while demodulator 103 extracts the information/data will degrade the performance of the receiver as a whole because, as variously reasoned hereinbefore, there will be a time period during which a previously, probably unsuitable, correction DC voltage will coexist with a newly programmed PGA gain. In such cases, high DC voltages may still reach input 215 of PGA 209, that is, until the new, and suitable, correction DC voltage LDC is finally applied to tuner 200 (shown at 207).
As stated before, the analog gain of the tuner 200 in changed in response to changes in the parasitic DC voltages and in the characteristics of the communication channel. Changes in the characteristics of the communication channel may occur, for example, due to various environmental changes and/or movement of the receiver relative to the transmitter. Parasitic DC voltages may result from various reasons. For example, parasitic DC voltages may occur due to an unbalanced receiver, specific RF frequency, poor LO-to-RF isolation, which is the isolation between the local frequency oscillator (“LO”) and the RF input that may cause self-mixing of the LO, due to temperature changes, and so on.
Referring again to FIG. 2, the overall gain of a zero-IF tuner typically consists of two major gains, the first of which is GLNA, which is the gain of the low noise amplifier (“LNA”) 201, and the second is GPGA, which is the gain of the base-band amplifier PGA 209. GLNA, the gain of LNA 201, may be controlled by a gain signal GLNA (shown at 202) that compensates for loss in the input signal level across the operating communication band. The value of GLNA mainly depends on the distance between the transmitter and the receiver and on the existence of transmissions from other broadcasting stations.
Selecting the required communication channel is done by changing the synthesizer's local frequency FLO (shown at 203), which also compensates for drifts in the signal's frequency. Mixer 204 multiplies the output signal of low noise amplifier 201 with the local frequency 203 to generate, thereby, the low-frequency IF signal (at 206) which is actually zero at in ZIF receiver. To DC correction circuit (a summing unit) 205 is fed a correction DC voltage LDC (shown at 207), which is subtracted from the parasitic DC voltage at the output of mixer 204, in order to eliminate, or at least minimize, the effect of the DC offset caused by the parasitic voltages as explained hereinabove. Low pass filter (LPF) 208 filters unwanted signals and noises so as to prevent aliasing in the ADC (not shown).
The gain of PGA 209 is controlled by gain signal GPGA (shown at 210) for compensating for the loss of the specific channel and other losses. By “loss of the specific channel” is meant failing to receive the main, and intended, communication path, in a multi-path situation, due to temporary poor multi-path conditions. GPGA (210) may also be used to adjust the signal's dynamic range to prevent the ADC (not shown) from entering into a saturation state.
Channel selectivity is generally performed by first setting the (local) frequency of the synthesizer FLO (shown at 203) to a frequency such that the mixing of the low noise amplifier (LNA) 201 output signal 217 with FLO will provide the IF signal (at 206). In order to process IF signal 206, IF signal 206 may be first converted to a digital signal. Therefore, an ADC may be used (not shown), which may be similar to ADC 103 of FIG. 1.